I. Field of the Invention
This invention relates to the field of barrier metal schemes implemented in VLSI devices.
II. Background Art
Integrated circuit devices are formed with semiconductor processing techniques in which conductive and insulative patterned layers are formed on the surface of a substrate, such as a monocrystalline silicon substrate. Devices formed in the semiconductor substrate are linked together through a "metallization" layer. A metallization layer is a pattern of metal or other conductive film used for interconnections, ohmic contacts and rectifying metal/semiconductor contacts. Aluminum is commonly used as a metal layer but other metals may be used as well, such as gold, platinum, etc. In addition, polycrystalline silicon can be used to form a conductive path.
There are some disadvantages when using aluminum as an interconnect metal layer or contact layer. For example, when aluminum is used as an electrical contact to an electrode region of an active device formed in a silicon substrate, the aluminum and silicon may interdiffuse. This can cause the aluminum to migrate into the silicon substrate below the junction formed between the doped region and the substrate, e.g., below the source or drain regions, thereby shorting out the device. Furthermore, silicon dissolves into aluminum during any subsequent high-temperature steps of the device fabrication process because of the relatively high solid solubility of silicon into aluminum. Thus, aluminum may propagate into the silicon substrate and thereby form spikes of aluminum into the substrate. The aluminum spikes will penetrate through the P-N junction in the silicon substrate and will accordingly destroy the P-N junction.
Contact and interconnect problems have become more sensitive as device geometry is scaled down to a submicron level. Such undesirable characteristics include high contact resistance, degradation of shallow junctions and aluminum migration. In order to overcome these problems in prior art, an interconnect system with barrier metals has been employed.
One prior art attempt to reduce the effects of aluminum migration is the use of a barrier layer between the aluminum layer and the silicon substrate, such as titanium tungsten (TiW). The barrier layer of titanium tungsten alloy is intended to prevent the formation of the aluminum spikes that can short the P-N junction.
In prior art, TiW has been applied as a barrier layer between the metal contact and silicon layer. Although TiW has been effective in providing good (low) metal to N.sup.+ -well contact resistance, metal to P.sup.+ -well contact resistance remains high and inconsistent. Furthermore, the TiW layer does not entirely eliminate the junction spiking since aluminum can still migrate through the TiW grain boundaries, degrading performance of the device.
One prior art scheme for providing a low resistance aluminum contact is described in Dixit, U.S. Pat. No. 4,884,123. Dixit describes a low resistance contact, which comprises a layer of titanium, a barrier layer formed over the titanium layer and a conductive layer formed over the barrier layer. In Dixit, a Ti layer and TiW layer are configured on a silicon substrate. An additional layer of tungsten or molybdemum is formed between the TiW layer and aluminum layer. The scheme of Dixit is a Ti/TiW/W/Al architecture.
Another prior art contact architecture is described in Sharma, U.S. Pat. No. 4,927,505. Sharma discloses a titanium-tungsten-nitride/titanium-tungsten/gold (TiWN/TiW/Au) packaging interconnect metallization scheme.
Black, U.S. Pat. No. 4,702,967 describes a Ti/TiN/Au contact scheme and Shankar, U.S. Pat. No. 4,782,380 describes a multi-layer conductive interconnection which is a barrier metal/conductor/barrier metal/Al architecture.
A disadvantage of these prior art contact architecture schemes is the complexity of processing resulting from implementing these schemes.
Therefore, it is an object of the present invention to provide an interconnect system for VLSI devices with low and consistent contact resistance values.
It is another object of the present invention to provide an interconnect system for VLSI devices that effectively prevents aluminum migration.
It is yet another object of the present invention to provide an interconnect system for VLSI devices that further improves metal-step coverage.